refactoring
- overlays/{linux,wine-osu}.nix -> packages/{linux-lava,wine-osu}/
- overlays/misc/ -> overlays/patches/
- overlays/misc/0001...patch -> packages/linux-lava/si...patch
- overlays/misc/wine/ -> packages/wine-osu/patches/
- flake.nix:
- overlays are dynamically read from overlays/
- define custom packages separately
- packages/*
- now imported using callPackage
This commit is contained in:
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268a85c2ef
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GPG key ID:
6500251E087653C9
15 changed files with 210 additions and 200 deletions
216
packages/linux-lava/si-manual-clocking.patch
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216
packages/linux-lava/si-manual-clocking.patch
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@ -0,0 +1,216 @@
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From 5d133651479c4be74cd7eb8006fc43366c9b15b9 Mon Sep 17 00:00:00 2001
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From: LavaDesu <me@lava.moe>
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Date: Wed, 3 Mar 2021 17:37:38 +0700
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Subject: [PATCH] Lava's amdgpu patches
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---
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drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 ++
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drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 2 +-
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drivers/gpu/drm/amd/pm/amdgpu_pm.c | 111 +++++++++++++++++++-
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drivers/gpu/drm/amd/pm/powerplay/si_dpm.c | 17 +++
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4 files changed, 130 insertions(+), 6 deletions(-)
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diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
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index 29885febc0b0..2ed893e8983c 100644
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--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
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+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
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@@ -191,6 +191,12 @@ extern int amdgpu_discovery;
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extern int amdgpu_mes;
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extern int amdgpu_noretry;
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extern int amdgpu_force_asic_type;
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+
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+extern __u32 amdgpu_force_mclk;
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+extern __u32 amdgpu_force_sclk;
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+extern __u32 amdgpu_force_vddc;
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+extern __u32 amdgpu_force_vddci;
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+
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#ifdef CONFIG_HSA_AMD
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extern int sched_policy;
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extern bool debug_evictions;
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diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
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index 47e0b48dc26f..f1e4485a60b2 100644
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--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
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+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
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@@ -146,7 +146,7 @@ static int amdgpu_dma_buf_attach(struct dma_buf *dmabuf,
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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int r;
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- if (pci_p2pdma_distance_many(adev->pdev, &attach->dev, 1, true) < 0)
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+ if (pci_p2pdma_distance_many(adev->pdev, &attach->dev, 1, amdgpu_dpm == 1) < 0)
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attach->peer2peer = false;
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if (attach->dev->driver == adev->dev->driver)
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diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
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index 5fa65f191a37..8a90331da0e5 100644
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--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
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+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
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@@ -39,6 +39,11 @@
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#include <asm/processor.h>
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#include "hwmgr.h"
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+__u32 amdgpu_force_mclk = 0;
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+__u32 amdgpu_force_sclk = 0;
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+__u32 amdgpu_force_vddc = 0;
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+__u32 amdgpu_force_vddci = 0;
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+
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static const struct cg_flag_name clocks[] = {
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{AMD_CG_SUPPORT_GFX_FGCG, "Graphics Fine Grain Clock Gating"},
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{AMD_CG_SUPPORT_GFX_MGCG, "Graphics Medium Grain Clock Gating"},
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@@ -2167,6 +2172,94 @@ static ssize_t amdgpu_get_gpu_metrics(struct device *dev,
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return size;
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}
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+/**
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+ * DOC: pp_override_mclk
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+ *
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+ * It's like pp_od_clk_voltage but worse and can potentially destroy your gpu idk
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+ */
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+static ssize_t amdgpu_get_pp_override_mclk(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ DRM_INFO("[Lava] Read pp_override_mclk\n");
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+ return sprintf(buf, "%u", amdgpu_force_mclk);
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+}
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+static ssize_t amdgpu_set_pp_override_mclk(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf,
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+ size_t count)
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+{
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+ sscanf(buf, "%u", &amdgpu_force_mclk);
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+ DRM_INFO("[Lava] Write pp_override_mclk, %u\n", amdgpu_force_mclk);
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+ return count;
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+}
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+
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+/**
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+ * DOC: pp_override_sclk
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+ *
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+ * pp_override_mclk but sclk
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+ */
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+static ssize_t amdgpu_get_pp_override_sclk(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ DRM_INFO("[Lava] Read pp_override_sclk\n");
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+ return sprintf(buf, "%u", amdgpu_force_sclk);
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+}
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+static ssize_t amdgpu_set_pp_override_sclk(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf,
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+ size_t count)
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+{
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+ sscanf(buf, "%u", &amdgpu_force_sclk);
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+ DRM_INFO("[Lava] Write pp_override_sclk, %u\n", amdgpu_force_sclk);
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+ return count;
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+}
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+
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+/**
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+ * DOC: pp_override_vddc
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+ *
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+ * pp_override_mclk but vddc
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+ */
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+static ssize_t amdgpu_get_pp_override_vddc(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ DRM_INFO("[Lava] Read pp_override_vddc\n");
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+ return sprintf(buf, "%u", amdgpu_force_vddc);
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+}
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+static ssize_t amdgpu_set_pp_override_vddc(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf,
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+ size_t count)
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+{
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+ sscanf(buf, "%u", &amdgpu_force_vddc);
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+ DRM_INFO("[Lava] Write pp_override_vddc, %u\n", amdgpu_force_vddc);
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+ return count;
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+}
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+
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+/**
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+ * DOC: pp_override_vddci
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+ *
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+ * pp_override_mclk but vddci
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+ */
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+static ssize_t amdgpu_get_pp_override_vddci(struct device *dev,
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+ struct device_attribute *attr,
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+ char *buf)
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+{
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+ DRM_INFO("[Lava] Read pp_override_vddci\n");
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+ return sprintf(buf, "%u", amdgpu_force_vddci);
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+}
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+static ssize_t amdgpu_set_pp_override_vddci(struct device *dev,
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+ struct device_attribute *attr,
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+ const char *buf,
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+ size_t count)
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+{
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+ sscanf(buf, "%u", &amdgpu_force_vddci);
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+ DRM_INFO("[Lava] Write pp_override_vddci, %u\n", amdgpu_force_vddci);
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+ return count;
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+}
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+
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static struct amdgpu_device_attr amdgpu_device_attrs[] = {
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AMDGPU_DEVICE_ATTR_RW(power_dpm_state, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
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AMDGPU_DEVICE_ATTR_RW(power_dpm_force_performance_level, ATTR_FLAG_BASIC),
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@@ -2193,6 +2286,10 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {
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AMDGPU_DEVICE_ATTR_RO(unique_id, ATTR_FLAG_BASIC),
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AMDGPU_DEVICE_ATTR_RW(thermal_throttling_logging, ATTR_FLAG_BASIC),
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AMDGPU_DEVICE_ATTR_RO(gpu_metrics, ATTR_FLAG_BASIC),
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+ AMDGPU_DEVICE_ATTR_RW(pp_override_mclk, ATTR_FLAG_BASIC),
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+ AMDGPU_DEVICE_ATTR_RW(pp_override_sclk, ATTR_FLAG_BASIC),
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+ AMDGPU_DEVICE_ATTR_RW(pp_override_vddc, ATTR_FLAG_BASIC),
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+ AMDGPU_DEVICE_ATTR_RW(pp_override_vddci, ATTR_FLAG_BASIC),
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};
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static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
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@@ -2220,11 +2317,15 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
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if (asic_type < CHIP_VEGA20)
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*states = ATTR_STATE_UNSUPPORTED;
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} else if (DEVICE_ATTR_IS(pp_od_clk_voltage)) {
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- *states = ATTR_STATE_UNSUPPORTED;
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- if ((is_support_sw_smu(adev) && adev->smu.od_enabled) ||
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- (is_support_sw_smu(adev) && adev->smu.is_apu) ||
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- (!is_support_sw_smu(adev) && hwmgr->od_enabled))
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- *states = ATTR_STATE_SUPPORTED;
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+ *states = ATTR_STATE_SUPPORTED;
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+ } else if (DEVICE_ATTR_IS(pp_override_mclk)) {
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+ *states = ATTR_STATE_SUPPORTED;
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+ } else if (DEVICE_ATTR_IS(pp_override_sclk)) {
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+ *states = ATTR_STATE_SUPPORTED;
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+ } else if (DEVICE_ATTR_IS(pp_override_vddc)) {
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+ *states = ATTR_STATE_SUPPORTED;
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+ } else if (DEVICE_ATTR_IS(pp_override_vddci)) {
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+ *states = ATTR_STATE_SUPPORTED;
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} else if (DEVICE_ATTR_IS(mem_busy_percent)) {
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if (adev->flags & AMD_IS_APU || asic_type == CHIP_VEGA10)
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*states = ATTR_STATE_UNSUPPORTED;
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diff --git a/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c b/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
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index afa1711c9620..74b847bf83e0 100644
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--- a/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
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+++ b/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
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@@ -3492,6 +3492,23 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
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&max_mclk_vddc);
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for (i = 0; i < ps->performance_level_count; i++) {
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+ if (amdgpu_force_mclk) {
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+ if (ps->performance_levels[i].mclk > amdgpu_force_mclk)
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+ ps->performance_levels[i].mclk = amdgpu_force_mclk;
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+ }
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+ if (amdgpu_force_sclk) {
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+ if (ps->performance_levels[i].sclk > amdgpu_force_sclk)
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+ ps->performance_levels[i].sclk = amdgpu_force_sclk;
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+ }
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+ if (amdgpu_force_vddc) {
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+ if (ps->performance_levels[i].vddc > amdgpu_force_vddc)
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+ ps->performance_levels[i].vddc = amdgpu_force_vddc;
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+ }
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+ if (amdgpu_force_vddci) {
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+ if (ps->performance_levels[i].vddci > amdgpu_force_vddci)
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+ ps->performance_levels[i].vddci = amdgpu_force_vddci;
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+ }
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+
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if (max_sclk_vddc) {
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if (ps->performance_levels[i].sclk > max_sclk_vddc)
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ps->performance_levels[i].sclk = max_sclk_vddc;
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--
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2.31.1
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