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refactoring

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- overlays/{linux,wine-osu}.nix -> packages/{linux-lava,wine-osu}/
- overlays/misc/ -> overlays/patches/
- overlays/misc/0001...patch -> packages/linux-lava/si...patch
- overlays/misc/wine/ -> packages/wine-osu/patches/
- flake.nix:
  - overlays are dynamically read from overlays/
  - define custom packages separately
- packages/*
  - now imported using callPackage
This commit is contained in:
LavaDesu 2021-06-26 23:48:15 +07:00
parent 268a85c2ef
commit d9b73bfd43
Signed by: cilly
GPG key ID: 6500251E087653C9
15 changed files with 210 additions and 200 deletions
Download patch file Download diff file Expand all files Collapse all files

129
packages/linux-lava/default.nix Normal file
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@ -0,0 +1,129 @@
{
buildLinux,
kernelPatches,
lib,
...
} @ args:
let
major = "5";
minor = "12";
patch = "13";
tkg = "2da317c20ed6f70085b195639b9aad2cacf31ab5";
mm = "${major}.${minor}";
mmp = "${major}.${minor}.${patch}";
kernelUrl = name: sha256: builtins.fetchurl {
inherit sha256;
url = "https://cdn.kernel.org/pub/linux/kernel/v${major}.x/${name}.xz";
};
tkgPatch = name: sha256: {
inherit name;
patch = builtins.fetchurl {
inherit sha256;
url = "https://raw.githubusercontent.com/Frogging-Family/linux-tkg/${tkg}/linux-tkg-patches/${mm}/${name}.patch";
};
};
in buildLinux (args // {
version = "${mmp}-tkg-Lava";
isZen = true;
# TODO:
# some stuff is set in pkgs/os-specific/linux/kernel/common-config.nix
# but i have no idea how to change it
structuredExtraConfig = with lib.kernel; builtins.mapAttrs (_: value: lib.mkForce value) {
LOCALVERSION = freeform "-tkg-Lava";
ZENIFY = yes;
FUTEX2 = yes;
MHASWELL = yes;
WINESYNC = module;
# timers
HZ_PERIODIC = no;
NO_HZ = yes;
NO_HZ_COMMON = yes;
NO_HZ_FULL = yes;
NO_HZ_IDLE = no;
CONTEXT_TRACKING = yes;
CONTEXT_TRACKING_FORCE = yes;
# HZ_100 = yes;
HZ_1000 = yes;
HZ_1000_NODEF = yes;
# preempt
PREEMPT = yes;
PREEMPT_COUNT = yes;
PREEMPT_VOLUNTARY = no;
PREEMPTION = yes;
PREEMPT_DYNAMIC = yes;
# scheduler
# SCHED_ALT = yes;
# SCHED_PDS = yes;
CACULE_SCHED = yes;
# cacule stuff
SCHED_AUTOGROUP = yes;
BSD_PROCESS_ACCT = no;
TASK_XACCT = no;
CGROUP_CPUACCT = no;
CGROUP_DEBUG = no;
# disable numa
NUMA = no;
AMD_NUMA = no;
X86_64_ACPI_NUMA = no;
NODES_SPAN_OTHER_NODES = no;
NUMA_EMU = no;
NEED_MULTIPLE_NODES = no;
USE_PERCPU_NUMA_NODE_ID = no;
ACPI_NUMA = no;
# disable misc debugging
SLUB_DEBUG = no;
PM_DEBUG = no;
PM_ADVANCED_DEBUG = no;
PM_SLEEP_DEBUG = no;
ACPI_DEBUG = no;
SCHED_DEBUG = no;
LATENCYTOP = no;
DEBUG_PREEMPT = no;
};
ignoreConfigErrors = true;
src = kernelUrl "linux-${mm}.tar" "0rn3z942vjc7bixjw066rm6kcr0x0wzgxqfq1f6xd113pzrgc3bx";
kernelPatches = [
# Kernel version patch
{
name = "patch-${patch}";
patch = kernelUrl "patch-${mmp}" "17d38hns5qfbw1pajpa5y38v86r49nqnw7a3pwsay5fapj69z8w4";
}
# AMD SI manual clocking
{
name = "si-clock";
patch = ./si-manual-clocking.patch;
}
# Graysky gcc patches
{
name = "graysky-gcc";
patch = builtins.fetchurl {
url = "https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/d2e7942c19ee568638d3795cf52db5274a90ce0a/more-uarches-for-kernel-5.8+.patch";
sha256 = "16jbknjlg12jxbj8cjkk01djvr01n9zz7qlzxppcqizmz55vk0wh";
};
}
# TK-Glitch patches
( tkgPatch "0002-clear-patches" "1h1gx6rq2c961d36z1szqv9xpq1xgz2bhqjsyb03jjdrdzlcv9rm" )
( tkgPatch "0003-cacule-${mm}" "1rgdk1x514xsjwcjjcdmggbaj6biql5p41skn98ysqbjaw7k22ib" )
( tkgPatch "0003-glitched-base" "1dg177i3y54z5nadc5678hm67angram2vlr314mpxv3jgsh7vj8s" )
( tkgPatch "0003-glitched-cfs" "1cm4s72pymxnh37da84qrzvrwbbwagk46m1xsk99ir7cjb1l1zay" )
# ( tkgPatch "0005-glitched-pds" "0833awp8n9ngyl5spx8znwyw1lj3nacp8vg7ffysw0j5r8akv9pw" )
( tkgPatch "0007-v${mm}-fsync" "0mplwdglw58bmkkxix4ccwgax3r02gahax9042dx33mybdnbl0mk" )
( tkgPatch "0007-v${mm}-futex2_interface" "1j29zyx2s85scfhbprgb9cs11rp50glbzczl4plphli8wds342pw" )
( tkgPatch "0007-v${mm}-winesync" "1av2k86ns0zc3lmgbfdch1z2a808brp2jvsfl4cwwlwwb51qzipp" )
# ( tkgPatch "0009-prjc_v${mm}-r1" "1z731jiwyc7z4d5hzd6szrxnvw0iygbqx82y2anzm32n22731dqv" )
( tkgPatch "0012-misc-additions" "092ws9v1snk61i6x3gbqm5m803zd81wykkdxizn7knvy2r611cbz")
];
} // (args.argsOverride or {}))

216
packages/linux-lava/si-manual-clocking.patch Normal file
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@ -0,0 +1,216 @@
From 5d133651479c4be74cd7eb8006fc43366c9b15b9 Mon Sep 17 00:00:00 2001
From: LavaDesu <me@lava.moe>
Date: Wed, 3 Mar 2021 17:37:38 +0700
Subject: [PATCH] Lava's amdgpu patches
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 2 +-
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 111 +++++++++++++++++++-
drivers/gpu/drm/amd/pm/powerplay/si_dpm.c | 17 +++
4 files changed, 130 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 29885febc0b0..2ed893e8983c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -191,6 +191,12 @@ extern int amdgpu_discovery;
extern int amdgpu_mes;
extern int amdgpu_noretry;
extern int amdgpu_force_asic_type;
+
+extern __u32 amdgpu_force_mclk;
+extern __u32 amdgpu_force_sclk;
+extern __u32 amdgpu_force_vddc;
+extern __u32 amdgpu_force_vddci;
+
#ifdef CONFIG_HSA_AMD
extern int sched_policy;
extern bool debug_evictions;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index 47e0b48dc26f..f1e4485a60b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
@@ -146,7 +146,7 @@ static int amdgpu_dma_buf_attach(struct dma_buf *dmabuf,
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
int r;
- if (pci_p2pdma_distance_many(adev->pdev, &attach->dev, 1, true) < 0)
+ if (pci_p2pdma_distance_many(adev->pdev, &attach->dev, 1, amdgpu_dpm == 1) < 0)
attach->peer2peer = false;
if (attach->dev->driver == adev->dev->driver)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 5fa65f191a37..8a90331da0e5 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -39,6 +39,11 @@
#include <asm/processor.h>
#include "hwmgr.h"
+__u32 amdgpu_force_mclk = 0;
+__u32 amdgpu_force_sclk = 0;
+__u32 amdgpu_force_vddc = 0;
+__u32 amdgpu_force_vddci = 0;
+
static const struct cg_flag_name clocks[] = {
{AMD_CG_SUPPORT_GFX_FGCG, "Graphics Fine Grain Clock Gating"},
{AMD_CG_SUPPORT_GFX_MGCG, "Graphics Medium Grain Clock Gating"},
@@ -2167,6 +2172,94 @@ static ssize_t amdgpu_get_gpu_metrics(struct device *dev,
return size;
}
+/**
+ * DOC: pp_override_mclk
+ *
+ * It's like pp_od_clk_voltage but worse and can potentially destroy your gpu idk
+ */
+static ssize_t amdgpu_get_pp_override_mclk(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ DRM_INFO("[Lava] Read pp_override_mclk\n");
+ return sprintf(buf, "%u", amdgpu_force_mclk);
+}
+static ssize_t amdgpu_set_pp_override_mclk(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ sscanf(buf, "%u", &amdgpu_force_mclk);
+ DRM_INFO("[Lava] Write pp_override_mclk, %u\n", amdgpu_force_mclk);
+ return count;
+}
+
+/**
+ * DOC: pp_override_sclk
+ *
+ * pp_override_mclk but sclk
+ */
+static ssize_t amdgpu_get_pp_override_sclk(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ DRM_INFO("[Lava] Read pp_override_sclk\n");
+ return sprintf(buf, "%u", amdgpu_force_sclk);
+}
+static ssize_t amdgpu_set_pp_override_sclk(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ sscanf(buf, "%u", &amdgpu_force_sclk);
+ DRM_INFO("[Lava] Write pp_override_sclk, %u\n", amdgpu_force_sclk);
+ return count;
+}
+
+/**
+ * DOC: pp_override_vddc
+ *
+ * pp_override_mclk but vddc
+ */
+static ssize_t amdgpu_get_pp_override_vddc(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ DRM_INFO("[Lava] Read pp_override_vddc\n");
+ return sprintf(buf, "%u", amdgpu_force_vddc);
+}
+static ssize_t amdgpu_set_pp_override_vddc(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ sscanf(buf, "%u", &amdgpu_force_vddc);
+ DRM_INFO("[Lava] Write pp_override_vddc, %u\n", amdgpu_force_vddc);
+ return count;
+}
+
+/**
+ * DOC: pp_override_vddci
+ *
+ * pp_override_mclk but vddci
+ */
+static ssize_t amdgpu_get_pp_override_vddci(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ DRM_INFO("[Lava] Read pp_override_vddci\n");
+ return sprintf(buf, "%u", amdgpu_force_vddci);
+}
+static ssize_t amdgpu_set_pp_override_vddci(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ sscanf(buf, "%u", &amdgpu_force_vddci);
+ DRM_INFO("[Lava] Write pp_override_vddci, %u\n", amdgpu_force_vddci);
+ return count;
+}
+
static struct amdgpu_device_attr amdgpu_device_attrs[] = {
AMDGPU_DEVICE_ATTR_RW(power_dpm_state, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
AMDGPU_DEVICE_ATTR_RW(power_dpm_force_performance_level, ATTR_FLAG_BASIC),
@@ -2193,6 +2286,10 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {
AMDGPU_DEVICE_ATTR_RO(unique_id, ATTR_FLAG_BASIC),
AMDGPU_DEVICE_ATTR_RW(thermal_throttling_logging, ATTR_FLAG_BASIC),
AMDGPU_DEVICE_ATTR_RO(gpu_metrics, ATTR_FLAG_BASIC),
+ AMDGPU_DEVICE_ATTR_RW(pp_override_mclk, ATTR_FLAG_BASIC),
+ AMDGPU_DEVICE_ATTR_RW(pp_override_sclk, ATTR_FLAG_BASIC),
+ AMDGPU_DEVICE_ATTR_RW(pp_override_vddc, ATTR_FLAG_BASIC),
+ AMDGPU_DEVICE_ATTR_RW(pp_override_vddci, ATTR_FLAG_BASIC),
};
static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
@@ -2220,11 +2317,15 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
if (asic_type < CHIP_VEGA20)
*states = ATTR_STATE_UNSUPPORTED;
} else if (DEVICE_ATTR_IS(pp_od_clk_voltage)) {
- *states = ATTR_STATE_UNSUPPORTED;
- if ((is_support_sw_smu(adev) && adev->smu.od_enabled) ||
- (is_support_sw_smu(adev) && adev->smu.is_apu) ||
- (!is_support_sw_smu(adev) && hwmgr->od_enabled))
- *states = ATTR_STATE_SUPPORTED;
+ *states = ATTR_STATE_SUPPORTED;
+ } else if (DEVICE_ATTR_IS(pp_override_mclk)) {
+ *states = ATTR_STATE_SUPPORTED;
+ } else if (DEVICE_ATTR_IS(pp_override_sclk)) {
+ *states = ATTR_STATE_SUPPORTED;
+ } else if (DEVICE_ATTR_IS(pp_override_vddc)) {
+ *states = ATTR_STATE_SUPPORTED;
+ } else if (DEVICE_ATTR_IS(pp_override_vddci)) {
+ *states = ATTR_STATE_SUPPORTED;
} else if (DEVICE_ATTR_IS(mem_busy_percent)) {
if (adev->flags & AMD_IS_APU || asic_type == CHIP_VEGA10)
*states = ATTR_STATE_UNSUPPORTED;
diff --git a/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c b/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
index afa1711c9620..74b847bf83e0 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/si_dpm.c
@@ -3492,6 +3492,23 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
&max_mclk_vddc);
for (i = 0; i < ps->performance_level_count; i++) {
+ if (amdgpu_force_mclk) {
+ if (ps->performance_levels[i].mclk > amdgpu_force_mclk)
+ ps->performance_levels[i].mclk = amdgpu_force_mclk;
+ }
+ if (amdgpu_force_sclk) {
+ if (ps->performance_levels[i].sclk > amdgpu_force_sclk)
+ ps->performance_levels[i].sclk = amdgpu_force_sclk;
+ }
+ if (amdgpu_force_vddc) {
+ if (ps->performance_levels[i].vddc > amdgpu_force_vddc)
+ ps->performance_levels[i].vddc = amdgpu_force_vddc;
+ }
+ if (amdgpu_force_vddci) {
+ if (ps->performance_levels[i].vddci > amdgpu_force_vddci)
+ ps->performance_levels[i].vddci = amdgpu_force_vddci;
+ }
+
if (max_sclk_vddc) {
if (ps->performance_levels[i].sclk > max_sclk_vddc)
ps->performance_levels[i].sclk = max_sclk_vddc;
--
2.31.1