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packages/linux-lava: bump to 6.4.12 with changes

Browse source 
- built with clang/llvm + thin lto, wahaha
- use ccache
- more tkg defaults
- removed old patches
- use eevdf + bore
This commit is contained in:
LavaDesu 2023-08-24 20:10:48 +07:00
parent d9e7668ff4
commit c57fe72f49
Signed by: cilly
GPG key ID: 6500251E087653C9
5 changed files with 48 additions and 446 deletions
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227
packages/linux-lava/atomic-async-page-flips.patch
View file

@ -1,227 +0,0 @@
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 288fce7dc0e..ad0341d89ec 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2791,6 +2791,7 @@ static int dce_v10_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;
adev_to_drm(adev)->mode_config.async_page_flip = true;
+ adev_to_drm(adev)->mode_config.atomic_async_page_flip_not_supported = true;
adev_to_drm(adev)->mode_config.max_width = 16384;
adev_to_drm(adev)->mode_config.max_height = 16384;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index cbe5250b31c..dda923cc908 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2909,6 +2909,7 @@ static int dce_v11_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;
adev_to_drm(adev)->mode_config.async_page_flip = true;
+ adev_to_drm(adev)->mode_config.atomic_async_page_flip_not_supported = true;
adev_to_drm(adev)->mode_config.max_width = 16384;
adev_to_drm(adev)->mode_config.max_height = 16384;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index b1c44fab074..dcef4f873b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2670,6 +2670,7 @@ static int dce_v6_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;
adev_to_drm(adev)->mode_config.async_page_flip = true;
+ adev_to_drm(adev)->mode_config.atomic_async_page_flip_not_supported = true;
adev_to_drm(adev)->mode_config.max_width = 16384;
adev_to_drm(adev)->mode_config.max_height = 16384;
adev_to_drm(adev)->mode_config.preferred_depth = 24;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index a22b45c9279..569bd11532e 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2688,6 +2688,7 @@ static int dce_v8_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;
adev_to_drm(adev)->mode_config.async_page_flip = true;
+ adev_to_drm(adev)->mode_config.atomic_async_page_flip_not_supported = true;
adev_to_drm(adev)->mode_config.max_width = 16384;
adev_to_drm(adev)->mode_config.max_height = 16384;
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
index 651e3c10936..831923c468d 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
@@ -639,6 +639,7 @@ static int atmel_hlcdc_dc_modeset_init(struct drm_device *dev)
dev->mode_config.max_height = dc->desc->max_height;
dev->mode_config.funcs = &mode_config_funcs;
dev->mode_config.async_page_flip = true;
+ dev->mode_config.atomic_async_page_flip_not_supported = true;
return 0;
}
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 79730fa1dd8..ee24ed7e2ed 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -1278,6 +1278,18 @@ static void complete_signaling(struct drm_device *dev,
kfree(fence_state);
}
+static void
+set_async_flip(struct drm_atomic_state *state)
+{
+ struct drm_crtc *crtc;
+ struct drm_crtc_state *crtc_state;
+ int i;
+
+ for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
+ crtc_state->async_flip = true;
+ }
+}
+
int drm_mode_atomic_ioctl(struct drm_device *dev,
void *data, struct drm_file *file_priv)
{
@@ -1318,9 +1330,16 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
}
if (arg->flags & DRM_MODE_PAGE_FLIP_ASYNC) {
- drm_dbg_atomic(dev,
- "commit failed: invalid flag DRM_MODE_PAGE_FLIP_ASYNC\n");
- return -EINVAL;
+ if (!dev->mode_config.async_page_flip) {
+ drm_dbg_atomic(dev,
+ "commit failed: DRM_MODE_PAGE_FLIP_ASYNC not supported\n");
+ return -EINVAL;
+ }
+ if (dev->mode_config.atomic_async_page_flip_not_supported) {
+ drm_dbg_atomic(dev,
+ "commit failed: DRM_MODE_PAGE_FLIP_ASYNC not supported with atomic\n");
+ return -EINVAL;
+ }
}
/* can't test and expect an event at the same time. */
@@ -1418,6 +1437,9 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
if (ret)
goto out;
+ if (arg->flags & DRM_MODE_PAGE_FLIP_ASYNC)
+ set_async_flip(state);
+
if (arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) {
ret = drm_atomic_check_only(state);
} else if (arg->flags & DRM_MODE_ATOMIC_NONBLOCK) {
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 8faad23dc1d..6c399e50e40 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -302,6 +302,11 @@ static int drm_getcap(struct drm_device *dev, void *data, struct drm_file *file_
case DRM_CAP_CRTC_IN_VBLANK_EVENT:
req->value = 1;
break;
+ case DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP:
+ req->value = drm_core_check_feature(dev, DRIVER_ATOMIC) &&
+ dev->mode_config.async_page_flip &&
+ !dev->mode_config.atomic_async_page_flip_not_supported;
+ break;
default:
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index fc5d94862ef..8793efbc049 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8616,6 +8616,7 @@ static void intel_mode_config_init(struct drm_i915_private *i915)
mode_config->funcs = &intel_mode_funcs;
mode_config->async_page_flip = HAS_ASYNC_FLIPS(i915);
+ mode_config->atomic_async_page_flip_not_supported = true;
/*
* Maximum framebuffer dimensions, chosen to match
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index a2f5df568ca..2b5c4f24aed 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -699,6 +699,7 @@ nouveau_display_create(struct drm_device *dev)
dev->mode_config.async_page_flip = false;
else
dev->mode_config.async_page_flip = true;
+ dev->mode_config.atomic_async_page_flip_not_supported = true;
drm_kms_helper_poll_init(dev);
drm_kms_helper_poll_disable(dev);
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index f12675e3d26..1185275c3f8 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -1588,6 +1588,7 @@ int radeon_modeset_init(struct radeon_device *rdev)
if (radeon_use_pflipirq == 2 && rdev->family >= CHIP_R600)
rdev->ddev->mode_config.async_page_flip = true;
+ rdev->ddev->mode_config.atomic_async_page_flip_not_supported = true;
if (ASIC_IS_DCE5(rdev)) {
rdev->ddev->mode_config.max_width = 16384;
diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
index b45dcdfd730..44102b80eb6 100644
--- a/drivers/gpu/drm/vc4/vc4_kms.c
+++ b/drivers/gpu/drm/vc4/vc4_kms.c
@@ -1048,6 +1048,7 @@ int vc4_kms_load(struct drm_device *dev)
dev->mode_config.helper_private = &vc4_mode_config_helpers;
dev->mode_config.preferred_depth = 24;
dev->mode_config.async_page_flip = true;
+ dev->mode_config.atomic_async_page_flip_not_supported = true;
ret = vc4_ctm_obj_init(vc4);
if (ret)
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 6b5e0129534..1b535d94f2f 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -917,6 +917,17 @@ struct drm_mode_config {
*/
bool async_page_flip;
+ /**
+ * @atomic_async_page_flip_not_supported:
+ *
+ * If true, the driver does not support async page-flips with the
+ * atomic uAPI. This is only used by old drivers which haven't yet
+ * accomodated for &drm_crtc_state.async_flip in their atomic logic,
+ * even if they have &drm_mode_config.async_page_flip set to true.
+ * New drivers shall not set this flag.
+ */
+ bool atomic_async_page_flip_not_supported;
+
/**
* @fb_modifiers_not_supported:
*
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 642808520d9..b1962628ecd 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ -706,7 +706,8 @@ struct drm_gem_open {
/**
* DRM_CAP_ASYNC_PAGE_FLIP
*
- * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC.
+ * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for legacy
+ * page-flips.
*/
#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
/**
@@ -767,6 +768,13 @@ struct drm_gem_open {
* Documentation/gpu/drm-mm.rst, section "DRM Sync Objects".
*/
#define DRM_CAP_SYNCOBJ_TIMELINE 0x14
+/**
+ * DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP
+ *
+ * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for atomic
+ * commits.
+ */
+#define DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 0x15
/* DRM_IOCTL_GET_CAP ioctl argument type */
struct drm_get_cap {

38
packages/linux-lava/default.nix
View file

@ -1,5 +1,7 @@
{ buildLinux { buildLinux
, callPackage , callPackage
, ccacheStdenv
, clangStdenv
, inputs , inputs
, kernelPatches , kernelPatches
, lib , lib
@ -10,8 +12,10 @@ let
sources = callPackage ./sources.nix { inherit inputs; }; sources = callPackage ./sources.nix { inherit inputs; };
in buildLinux (args // { in buildLinux (args // {
inherit (sources) src kernelPatches; inherit (sources) src kernelPatches;
stdenv = ccacheStdenv.override { stdenv = clangStdenv; };
version = "${sources.version}-tkg-Lava"; version = "${sources.version}-tkg-Lava";
isZen = true; isZen = true;
extraMakeFlags = [ "LLVM=1" "LLVM_IAS=1" ];
# TODO: # TODO:
# some stuff is set in pkgs/os-specific/linux/kernel/common-config.nix # some stuff is set in pkgs/os-specific/linux/kernel/common-config.nix
# but i have no idea how to change it # but i have no idea how to change it
@ -20,6 +24,39 @@ in buildLinux (args // {
ZENIFY = yes; ZENIFY = yes;
WINESYNC = module; WINESYNC = module;
#tkg defaults
DYNAMIC_FAULT = no;
DEFAULT_FQ_CODEL = no;
WERROR = no;
NTP_PPS = no;
ZSWAP_COMPRESSOR_DEFAULT_LZO = no;
PROFILE_ALL_BRANCHES = no;
CRYPTO_LZ4 = yes;
CRYPTO_LZ4HC = yes;
LZ4_COMPRESS = yes;
LZ4HC_COMPRESS = yes;
ZSWAP_COMPRESSOR_DEFAULT_LZ4 = yes;
DEBUG_FORCE_FUNCTION_ALIGN_64B = no;
X86_P6_NOP = no;
RCU_STRICT_GRACE_PERIOD = no;
ZSWAP_COMPRESSOR_DEFAULT = freeform "lz4";
CPU_FREQ_DEFAULT_GOV_SCHEDUTIL = yes;
CPU_FREQ_DEFAULT_GOV_ONDEMAND = no;
CPU_FREQ_DEFAULT_GOV_CONSERVATIVE = no;
CPU_FREQ_DEFAULT_GOV_PERFORMANCE = no;
CPU_FREQ_DEFAULT_GOV_PERFORMANCE_NODEF = no;
BLK_DEV_LOOP = module;
I2C_NCT6775 = module; # openrgb
# clang/llvm
LTO_CLANG_FULL = no;
LTO_CLANG_THIN = yes;
LTO_NONE = no;
KCSAN = no;
INIT_ON_FREE_DEFAULT_ON = yes;
INIT_STACK_ALL_ZERO = yes;
INIT_STACK_NONE = no;
# tickless timers # tickless timers
HZ_PERIODIC = no; HZ_PERIODIC = no;
NO_HZ = yes; NO_HZ = yes;
@ -69,5 +106,4 @@ in buildLinux (args // {
LATENCYTOP = no; LATENCYTOP = no;
DEBUG_PREEMPT = no; DEBUG_PREEMPT = no;
}; };
ignoreConfigErrors = true;
} // (args.argsOverride or {})) } // (args.argsOverride or {}))

195
packages/linux-lava/si-manual-clocking.patch
View file

@ -1,195 +0,0 @@
From fca48ab00a55955f8f495e0c4bbfb3110fdc5004 Mon Sep 17 00:00:00 2001
From: LavaDesu <me@lava.moe>
Date: Wed, 28 Dec 2022 20:28:18 +0700
Subject: [PATCH] Lava's amdgpu patches
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 106 +++++++++++++++++++++
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 17 ++++
3 files changed, 127 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2eca5822055..503f3b889f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -215,6 +215,10 @@ extern int amdgpu_noretry;
extern int amdgpu_force_asic_type;
extern int amdgpu_smartshift_bias;
extern int amdgpu_use_xgmi_p2p;
+extern uint amdgpu_force_mclk;
+extern uint amdgpu_force_sclk;
+extern uint amdgpu_force_vddc;
+extern uint amdgpu_force_vddci;
#ifdef CONFIG_HSA_AMD
extern int sched_policy;
extern bool debug_evictions;
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 236657eece4..747aeb00d38 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -35,6 +35,11 @@
#include <linux/pm_runtime.h>
#include <asm/processor.h>
+__u32 amdgpu_force_mclk = 0;
+__u32 amdgpu_force_sclk = 0;
+__u32 amdgpu_force_vddc = 0;
+__u32 amdgpu_force_vddci = 0;
+
static const struct cg_flag_name clocks[] = {
{AMD_CG_SUPPORT_GFX_FGCG, "Graphics Fine Grain Clock Gating"},
{AMD_CG_SUPPORT_GFX_MGCG, "Graphics Medium Grain Clock Gating"},
@@ -1912,6 +1917,94 @@ static int ss_bias_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
return 0;
}
+/*
+ * DOC: pp_override_mclk
+ *
+ * It's like pp_od_clk_voltage but worse and can potentially destroy your gpu idk
+ */
+static ssize_t amdgpu_get_pp_override_mclk(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ DRM_INFO("[Lava] Read pp_override_mclk\n");
+ return sprintf(buf, "%u", amdgpu_force_mclk);
+}
+static ssize_t amdgpu_set_pp_override_mclk(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ sscanf(buf, "%u", &amdgpu_force_mclk);
+ DRM_INFO("[Lava] Write pp_override_mclk, %u\n", amdgpu_force_mclk);
+ return count;
+}
+
+/**
+ * DOC: pp_override_sclk
+ *
+ * pp_override_mclk but sclk
+ */
+static ssize_t amdgpu_get_pp_override_sclk(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ DRM_INFO("[Lava] Read pp_override_sclk\n");
+ return sprintf(buf, "%u", amdgpu_force_sclk);
+}
+static ssize_t amdgpu_set_pp_override_sclk(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ sscanf(buf, "%u", &amdgpu_force_sclk);
+ DRM_INFO("[Lava] Write pp_override_sclk, %u\n", amdgpu_force_sclk);
+ return count;
+}
+
+/**
+ * DOC: pp_override_vddc
+ *
+ * pp_override_mclk but vddc
+ */
+static ssize_t amdgpu_get_pp_override_vddc(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ DRM_INFO("[Lava] Read pp_override_vddc\n");
+ return sprintf(buf, "%u", amdgpu_force_vddc);
+}
+static ssize_t amdgpu_set_pp_override_vddc(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ sscanf(buf, "%u", &amdgpu_force_vddc);
+ DRM_INFO("[Lava] Write pp_override_vddc, %u\n", amdgpu_force_vddc);
+ return count;
+}
+
+/**
+ * DOC: pp_override_vddci
+ *
+ * pp_override_mclk but vddci
+ */
+static ssize_t amdgpu_get_pp_override_vddci(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ DRM_INFO("[Lava] Read pp_override_vddci\n");
+ return sprintf(buf, "%u", amdgpu_force_vddci);
+}
+static ssize_t amdgpu_set_pp_override_vddci(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ sscanf(buf, "%u", &amdgpu_force_vddci);
+ DRM_INFO("[Lava] Write pp_override_vddci, %u\n", amdgpu_force_vddci);
+ return count;
+}
+
static struct amdgpu_device_attr amdgpu_device_attrs[] = {
AMDGPU_DEVICE_ATTR_RW(power_dpm_state, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
AMDGPU_DEVICE_ATTR_RW(power_dpm_force_performance_level, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
@@ -1944,6 +2037,11 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {
.attr_update = ss_power_attr_update),
AMDGPU_DEVICE_ATTR_RW(smartshift_bias, ATTR_FLAG_BASIC,
.attr_update = ss_bias_attr_update),
+
+ AMDGPU_DEVICE_ATTR_RW(pp_override_mclk, ATTR_FLAG_BASIC),
+ AMDGPU_DEVICE_ATTR_RW(pp_override_sclk, ATTR_FLAG_BASIC),
+ AMDGPU_DEVICE_ATTR_RW(pp_override_vddc, ATTR_FLAG_BASIC),
+ AMDGPU_DEVICE_ATTR_RW(pp_override_vddci, ATTR_FLAG_BASIC),
};
static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
@@ -1976,6 +2074,14 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
*states = ATTR_STATE_UNSUPPORTED;
if (amdgpu_dpm_is_overdrive_supported(adev))
*states = ATTR_STATE_SUPPORTED;
+ } else if (DEVICE_ATTR_IS(pp_override_mclk)) {
+ *states = ATTR_STATE_SUPPORTED;
+ } else if (DEVICE_ATTR_IS(pp_override_sclk)) {
+ *states = ATTR_STATE_SUPPORTED;
+ } else if (DEVICE_ATTR_IS(pp_override_vddc)) {
+ *states = ATTR_STATE_SUPPORTED;
+ } else if (DEVICE_ATTR_IS(pp_override_vddci)) {
+ *states = ATTR_STATE_SUPPORTED;
} else if (DEVICE_ATTR_IS(mem_busy_percent)) {
if (adev->flags & AMD_IS_APU || gc_ver == IP_VERSION(9, 0, 1))
*states = ATTR_STATE_UNSUPPORTED;
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index 49c398ec0aa..1f3f8a210e7 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -3507,6 +3507,23 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
&max_mclk_vddc);
for (i = 0; i < ps->performance_level_count; i++) {
+ if (amdgpu_force_mclk) {
+ if (ps->performance_levels[i].mclk > amdgpu_force_mclk)
+ ps->performance_levels[i].mclk = amdgpu_force_mclk;
+ }
+ if (amdgpu_force_sclk) {
+ if (ps->performance_levels[i].sclk > amdgpu_force_sclk)
+ ps->performance_levels[i].sclk = amdgpu_force_sclk;
+ }
+ if (amdgpu_force_vddc) {
+ if (ps->performance_levels[i].vddc > amdgpu_force_vddc)
+ ps->performance_levels[i].vddc = amdgpu_force_vddc;
+ }
+ if (amdgpu_force_vddci) {
+ if (ps->performance_levels[i].vddci > amdgpu_force_vddci)
+ ps->performance_levels[i].vddci = amdgpu_force_vddci;
+ }
+
if (max_sclk_vddc) {
if (ps->performance_levels[i].sclk > max_sclk_vddc)
ps->performance_levels[i].sclk = max_sclk_vddc;
--
2.37.3

22
packages/linux-lava/sources.nix
View file

@ -1,17 +1,18 @@
{ fetchFromGitHub, inputs, lib }: { fetchFromGitHub, inputs, lib }:
let let
version = "6.3.8"; version = "6.4.12";
kernelHash = "07ivnxynbmvk3sh2z4i8sp6my2397m746h64f2ip1lkbxpsr2d5s"; kernelHash = "1wx7innfzlx508f7csfwp6k017wcljdy783pmi6a9v1c1j7mi84g";
kernelPatchHash = "1d4154704940g7h58mv5djkcvhy334zslh161giwhmm57lysjywj"; kernelPatchHash = "0va10x241v5dmks5p3242j5ihyfiydb3qri4mh6cjg0803mpzmnw";
boreVersion = "3.1.2";
mm = lib.versions.majorMinor version; mm = lib.versions.majorMinor version;
tkgPatches = [ tkgPatches = [
"0001-mm-Support-soft-dirty-flag-reset-for-VA-range" "0001-mm-Support-soft-dirty-flag-reset-for-VA-range"
"0002-clear-patches" "0002-clear-patches"
"0002-mm-Support-soft-dirty-flag-read-with-reset" "0002-mm-Support-soft-dirty-flag-read-with-reset"
"0003-eevdf"
"0003-glitched-base" "0003-glitched-base"
"0003-glitched-cfs" "0003-glitched-cfs"
"0003-glitched-cfs-additions"
"0007-v${mm}-fsync1_via_futex_waitv" "0007-v${mm}-fsync1_via_futex_waitv"
"0007-v${mm}-winesync" "0007-v${mm}-winesync"
"0012-misc-additions" "0012-misc-additions"
@ -32,8 +33,8 @@ let
borePatch = { borePatch = {
name = "bore-patch"; name = "bore-patch";
patch = builtins.fetchurl { patch = builtins.fetchurl {
url = "https://raw.githubusercontent.com/CachyOS/kernel-patches/a108a60471fe304e5321394238a4f6107a1d466e/${mm}/sched/0001-bore.patch"; url = "https://raw.githubusercontent.com/firelzrd/bore-scheduler/033cf689936a21af725207aa48f34076ac9a1f03/eevdf-bore-dev/0001-linux${mm}.y-eevdf-bore${boreVersion}.patch";
sha256 = "1qvy3sq6vc7f1mggwkxrmbzmwjabp3vmcywm81gmbcpd87l786n9"; sha256 = "019n33kfkjyx3zq8vjkl3jgilybhh6bznfybzhgjlyhs3qlrrrgw";
}; };
}; };
in { in {
@ -50,13 +51,12 @@ in {
kernelPatches = [ kernelPatches = [
kernelPatchSrc kernelPatchSrc
borePatch
#(patch ./si-manual-clocking.patch)
#(patch ./atomic-async-page-flips.patch)
#(patch ./winesync-hotfix.patch)
] ]
++ builtins.map (name: { ++ builtins.map (name: {
inherit name; inherit name;
patch = "${inputs.linux-tkg}/linux-tkg-patches/${mm}/${name}.patch"; patch = "${inputs.linux-tkg}/linux-tkg-patches/${mm}/${name}.patch";
}) tkgPatches; }) tkgPatches
++ [
borePatch
];
} }

12
packages/linux-lava/winesync-hotfix.patch
View file

@ -1,12 +0,0 @@
diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile
index 1fc89b8ef43..c2064a35688 100644
--- a/tools/testing/selftests/Makefile
+++ b/tools/testing/selftests/Makefile
@@ -13,7 +13,6 @@ TARGETS += damon
TARGETS += drivers/dma-buf
TARGETS += drivers/s390x/uvdevice
TARGETS += drivers/net/bonding
-TARGETS += drivers/net/team
TARGETS += efivarfs
TARGETS += exec
TARGETS += filesystems